Damian Budd

B.Sc. Eng. (Hons) Electronic Engineer, Hobbyist and Private Pilot

750W Power Factor Corrected Switch-Mode power supply

Motivation

Traditionally almost all high-end audio amplifiers make use of large toroidal transformers and large can electrolytic capacitors in their power supplies. The reason for this is to provide the lowest practical impedance for the amplifier from the power supply. However such large transformers are not only expensive and heavy, but the classic transformer – bridge rectifier – smoothing capacitor circuit also has a poor power factor. My earlier work on the PC simulation utility (see 120W Amplifier project) used to determine the required size of transformer for a given amplifier design revealed that the peak charging currents during the conduction period of the rectifier can be many times greater than the average current drawn by the amplifier. A power factor corrected supply does not draw such large currents from the mains supply and so the losses in the supply lines are substantially reduced. In the present times where power efficiency and green initiatives are becoming more important this is obviously very desirable.


But there's another side to this argument. Consider what the power supply impedance looks like to the amplifier. During the conduction cycle of the rectifier the impedance of the power supply as “seen” by the amplifier consists of the transformer secondary impedance in parallel with the smoothing capacitors. For higher frequencies say above 100Hz the impedance of the large can electrolytic capacitors will be much lower than the impedance of the transformer secondary and will effectively mask it. However below 100Hz and depending on the size of the smoothing capacitors, the impedance of the capacitors may be similar to or greater than the impedance of the transformer secondary. Hence the switching on and off of the rectifier is essentially connecting and disconnecting the transformer secondary in parallel with the smoothing capacitors. This means the effective impedance seen by the amplifier changes. In the case of a 50Hz mains cycle this switching occurs every 10mS or at 100Hz - which is well within the audible range. This is quite similar to the way a diode ring mixer circuit works in a radio receiver and consequently there will be mixer products at the sum and difference frequencies of the input signals. With a little bit of imagination one can guess the potentially negative consequences this will have on those deep bass signals the amplifier is trying so hard to reproduce accurately. By making use of a switch-mode supply where the switching frequency is way beyond the audible range, the secondary of the switch-mode transformer will appear to be permanently connected in parallel with the filter capacitor. What's more at the switching frequency the impedance of the filter capacitor is so low that it will mask the switching in and out of the transformer. Hence in principal a switch mode power supply can provide a very clean supply for an audio amplifier.


My aim of this project is to design a quality power factor corrected switch-mode power supply for use with my amplifier designs and hence eliminate the need to use large toroidal transformers as well as overcoming this “impedance switching” issue.

Specification

750W continuous RMS power output.

Voltage: 63V

Current: 11.9A

Description

The power supply consists of two parts – the power factor correction pre-regulator and the step down DC to DC converter. Most power factor correction pre-regulators are designed to operate with a wide input range of 85 – 265 VAC so that they can be used in any country world-wide. They boost the output voltage to around 400Vdc. This is followed by the step down DC-DC converter of the more traditional type which also provides galvanic isolation from the mains supply.


With power factor correction circuits there are two topologies – discontinuous conduction and continuous conduction regulation. The discontinuous conduction circuit is relatively simple. It uses a fixed duration on time and variable off time for the current switch which makes use of the varying voltage of the line input to shape the current into a sine wave. The continuous conduction regulator is quite a bit more complicated and requires implementing analogue multiplier circuits. I opted to use a continuous conduction mode controller since for a given output power the peak current in the inductor and switch are lower than for a discontinuous controller. This allows the use of smaller components and the EMI interference is lower so filtering and suppression circuits can be smaller.


The device I used for the PFC regulator is the On-semi NCP1650. This device is quite a clever little beast which not only implements some cunning circuits for the multipliers, but also has very comprehensive protection features which safeguard the power switch and down stream sensitive electronic circuits from harm if things get out of hand. For the step down regulator circuit I opted to use an H-bridge topology which is driven by two International Rectifier IR2113 high and low side drivers and controlled from a SG2524 PWM controller. For the PFC inductor I used a Micrometals powdered iron toroid core and wound myself. I also implemented common mode and differential mode filtering on the line input to the PFC circuit.


I laid out a PC board for this circuit using a double sided board paying very careful attention to the routing. The main current loops which conduct the high frequency currents are small and consist of wide regions of copper. I made liberal use of copper pour to create these traces. The circuit for the NCP1650 device and its associated components is on a separate ground region that is connected to the main signal ground at only one place. I had two circuit boards professionally manufactured as prototypes.


When it came to assembly and testing, my approach with this sort of project where high voltages and current are involved is to proceed with extreme caution and test small bits of it at a time. I first assembled only those components relating to the PFC pre-regulator circuit. To test the circuit I use two large toroidal transformers I have spare, connected in a back to back configuration to provide me with an isolated 110VAC supply. I also purchased a high voltage 100:1 probe for use with my Pico scope to measure signals. The reason I decided to start off with a lower voltage is with circuits that switch high voltages and high currents, if something is wrong, the first you usually know about it is when there is a flash and a bang and most of the semiconductors go up in smoke. Trying to do a post-mortem on such a circuit to find out the root cause of the problem can be extremely difficult.


At first power up the PFC pre-regulator circuit appeared to be operational, but it wasn't regulating properly. On no load the output voltage went to the maximum of 432V where the device goes into over voltage cut-off at 1.08% of the set output. With a load the output voltage would regulate to the correct level, but the current waveform was clearly not a clean sinusoid. Due to the protection features of the NCP1650, the circuit could actually operate like this without harming itself, but that is not the point of power factor correction. It was going to need further attention. On Semiconductor provide a very comprehensive spreadsheet for the NCP1650 to assist the designer in choosing component values and determining how the circuit is going to work, but it does not really help one to gain a deeper understanding of what is actually going on inside the device. They also do not provide a spice model for the NCP1650 although they do have spice models for some of their other switch-mode regulators. I therefore decided that I would build up my own simulation model for the device and circuit using the APLAC circuit simulator and hopefully in doing so gain a better understanding of how the device really works. The NCP1650 regulator circuit consists of 3 control loops and where control loops are involved it is always a good idea to know exactly what is going on so one can be certain the circuit will remain stable under all loads and operating conditions.

 

The first part of the modelling process was to build up a comprehensive model of the internal circuit of the NCP1650 device. The data sheet for the device gives a descriptive breakdown of the circuit elements inside the device in sufficient detail to be able to create equivalent circuit models for each internal block. Using the sub model feature of APLAC I built each circuit section into its own sub model so that I could use a hierarchical design. As the model grew it became apparent that some optimisation was going to be required since the increasing number of circuit nodes resulted in an exponentially increasing simulation time. I decided to limit the model to only implementing the voltage control loop and then at a later stage if it was necessary I would implement the power control loop. Once I had completed the device model and my circuit model the resulting simulation waveforms showed good agreement with the information contained in the data sheet. By this time I had also started to develop a pretty good understanding of how the device is intended to work. Simulation time is quite long however - to simulate a 20mS period with a time step interval of 50nS it can take up to an hour on a reasonably fast computer. The 50nS time step is required for sufficient detail of the high frequency switching waveforms (200 points per switching cycle at 100kHz) and to correctly simulate the input EMI filter response up to 20MHz. For this reason simulations have to be started with some pre determined initial conditions which are close to the final steady state operating conditions or else the time required for the simulation to reach steady state could be in the order of days.

APLAC simulation showing rectified AC input (green), high frequency switching on the Drain node of the power device (blue) and Output voltage (red) resting on top of the blue.

APLAC simulation showing loop compensation VERR (Pin 7), VLINE (internal signal), ac ref VREF (Pin 4) and AC comp VAC_COMP (Pin 3).

 

Zoom view of above showing the same signals in detail.

 

Current sense input (Pin 12)

 

Zoom view of current sense input.

 

I then started to introduce realistic parasitic values into the model to understand their effect and try to determine a possible cause of the distorted current wave. By far the most significant parasitic turned out to be adding stray capacitance across the PFC inductor. This capacitance causes large current spikes at the switching instances of the power MOSFET which get sensed by the current sense feedback resistor. These current spikes can seriously mess around with the high speed current control loop in the NCP1650. The high speed current loop is the control loop that attempts to modulate the current waveform in the PFC inductor at the switching frequency of the controller. Because this loop is fast it has no filtering on it and is therefore very susceptible to noise. To illustrate, consider the effect of adding a 100pF capacitor directly across the PFC inductor. The hot end of the inductor is being switched between 0V and 400V. A typical switching time of 20nS - 30nS is not unrealistic for the power device. This gives a dV/dT across the 100pF capacitor of 20e+09 V/s. The current spike will then be in the order of 2A. This current is within an order of magnitude of the quasi-DC current that flows through the PFC inductor and hence will generate an appreciable interfering voltage across the current sense resistor. By close inspection of the frequency of the ringing on the PFC inductor on the real circuit I was able to calculate an estimate of the size of the parasitic capacitance across the inductor and then applied this value as a parasitic to the PFC inductor in the simulation model. The resulting simulated waveforms very closely resembled the real waveforms I was measuring on the actual circuit - Bingo! This clearly pin pointed the parasitic capacitance as being the culprit. I therefore revisited the design of the PFC inductor.


I had constructed the PFC inductor using a spare Micrometals T157-2 core I had spare. Since the -2 material has quite a low permeability material, it was necessary to have a multilayer winding to achieve the required inductance. Admittedly when I first wound the inductor I hadn't paid any particular attention to the parasitic capacitance of this arrangement, but it was now obvious that it was an issue. I contacted a Micrometals supplier and ordered a selection of -26 and -52 cores of various sizes. Then making use of two T157-52 cores in a stacked configuration I wound a single layer inductor to specification. The improvement in the current waveform of the PFC circuit was quite noticeable. One other change I made to the circuit was the addition of a single pole RC filter to the current sense input of the NCP1650. The NCP1650 datasheet seems to suggest that incorporating a filter on this input should be avoided, however the schematic of the On-Semi 1kW evaluation board shows such a filter. I figured the designer of the evaluation board knew something I didn't and put the filter there for a reason, so I implemented a filter and this has also noticeably helped to clean up distortion caused by noise on the line current sinusoid . It seems reasonable to assume then that some filtering is required on this input, provided that the filtering allows the triangular shape of the current waveform to be preserved whilst rejecting high frequency noise and spikes.

 

As of writing this project is still a work in progress and the photograph below shows the current state of the project.

PFC pre-regulator section assembled and tested, DC-DC section still to do.

Duration

March 2009 – present date