I am electronic engineer and private pilot – that's my excuse for wanting to make my own airband receiver.
In my final year at university I studied RF design as one of my final year subjects. Part of the course was a practical to construct a simple airband receiver. After getting something very basic and crude working for the practical I decided to set about making my own real receiver.
Dual conversion, digitally synthesized super-heterodyne portable (battery powered) hand-held AM receiver.
Frequency range: 118.000MHz – 136.000MHz
Channel spacing: 5, 10, 25, 50kHz selectable
Digital functions: 10 memories, memory scanning and full band scanning (30 channels/second)
This project has gone through a fair number of iterations as can be expected from a design of such complexity and difficulty. The original circuit consisted of two PC boards – one for the RF front end and one for the IF stages and detector. I was fortunate to have access to my university's full suite of RF test gear, without which attempting such a project with no past RF experience would have been impossible.
The first design consisted of a discrete BJT RF front end amplifier operating from 118-136MHz delivering around 20dB gain. I opted to use a common base configuration since the input impedance is controlled, well behaved and predictable and the reverse transfer coefficient is small – meaning that changes in the impedance seen on the collector would not reflect back to the input (Common Base configuration does not suffer as much from the Miller effect like the common emitter configuration does.) This was important since I designed a tracking tuned LC circuit to operate on the output and provide some selectivity and didn't want changes in the tuning on the output to affect the input matching. The RF amplifier stage also needed to operate as one of the automatic gain control amplifiers for the receiver, so changes in bias to the transistor (due to the AGC acting) should not affect the input or output matching greatly.
I then fed the output of the RF amplifier into a single balanced JFET mixer (driven into the gate). I opted to use a JFET since it is a square law device and has good dynamic range. I constructed a discrete BJT varactor tuned local oscillator to operate from 128.7-146.7MHz (10.7MHz IF), buffered this through a single BJT stage and fed it into the source node of the JFET mixer. With a tuned LC circuit on the drain of the JFET mixer to select the 10.7MHz IF signal product, the output was then fed into a 10.7MHz AGC amplifier. I designed the 10.7MHz AGC amplifier using a differential amplifier with the emitters of the long tailed pair connected to a variable current sink (single BJT). This configuration provides a very effective variable gain amplifier where the gain is easy to control by varying the current through the current sink. Also by driving the input signal into the base of one of the transistors, with its collector connected directly to the supply and taking the output from the other collector, one can avoid the problem of the Miller effect and issues with gain changes affecting the input and output matching. I was able to achieve 40dB of gain from this amplifier. The output signal from this amplifier was taken off the PC board and fed into the input of the intermediate frequency (IF) PC board.
The IF PC board consisted of a second JFET mixer to mix the 10.7MHz first IF down to 455kHz, using a 11.155MHz crystal oscillator source, another AGC gain stage using a differential pair, a 455kHz ceramic filter for final selectivity, and some common emitter gain stages, with an emitter follower stage driving into a germanium diode detector. The first iteration of the IF PC board proved to be a failure - with the large amount of gain in the receiver chain, feedback was getting into the input stages through the supply line which resulted in the whole board oscillating. First lesson in RF design – place supply decoupling on every element of the circuit. With decoupling added and a new layout the oscillation problem was solved and the IF board worked well.
I constructed an audio amplifier stage and AGC control circuit on a breadboard for the baseband signals. Initially I controlled the tuning with a variable resistor – applying a variable voltage to the varactor diodes of the local oscillator and RF amplifier tracking filter. Now unlike a broadcast receiver where there is a constant transmission which is easy to tune to, aircraft transmissions are very intermittent. Additionally the selectivity of an airband receiver is much narrower than that of a FM broadcast receiver (approximately 10kHz as opposed to 250kHz). This makes trying to manually tune to a particular frequency very difficult. However with perseverance and a multimeter I was repeatedly able to tune to a number of local frequencies. Despite being a relatively crude design at this stage it actually worked exceptionally well. Transmissions were very clear and undistorted. I was able to hear very clearly transmissions from both the tower and aircraft on the ground from an airport that was 20 km away as the crow flies and was below the horizon.
Since manually tuning the receiver was not a very feasible option in the long term the next step was to add a PLL synthesizer to set the frequency of the VCO. I had intended to do this all along, thus the use of varactor diodes for tuning the oscillator and RF tracking filter. I opted to use the Philips UMA1014T synthesizer device upon recommendation from one of the technical staff at my university. This device which has long since gone obsolete was fairly easy to use and came with a very comprehensive application note for calculating the loop filter. I constructed a small PC board for the synthesizer and its associated components and then wired this up to the RF front end PC board. The UMA1014T is programmed using an I2C interface and initially just to get something working I “manually” programmed the device using push buttons on the I2C data and clock lines with single clock pulses. Although very slow, this method enabled me to get to grips with the I2C protocol. Ultimately the synthesizer was going to need to be programmed from a microprocessor. I also constructed a simple squelch circuit to silence the receiver when there were no transmissions. At this point the whole design was working well, but it was spread out over several PC boards and bread boards.
First RF front end (left), IF (right) and PLL synth (bottom) PC boards
I then set about working on the user interface and microprocessor control. I opted to use a 3 x 4 keypad for user input to set the frequency and a 14-segment alpha numeric LCD display. The microprocessor I chose was the very popular (at the time) Microchip PIC16C84. Since this was my first real microprocessor and software project this device was probably the easiest device to undertake this task with. Also at the time (end of 1995 – beginning of 1996) there weren't many embedded micro's on the market that also came with free development tools albeit only for development in assembly language.
I wrote functions (in assembly language) to set the frequency (which included bounds checking on the value typed in by the user), select the channel spacing from the options of 5, 10, 25 and 50kHz, store and recall frequency settings in 10 different memory slots, scan the 10 memory slots and perform a full band scan. The scanning function works as follows: the synthesizer is programmed to a frequency (next stored memory or next incremental channel), a short time is allowed for the PLL to lock and the squelch to respond. If there is a transmission present on that frequency of sufficient signal strength to break the squelch level then it interrupts the microprocessor causing it to pause the scanning process. Otherwise after a time-out period the microprocessor tunes the receiver to the next frequency and the process repeats. This is pretty much the way most scanning receivers work. My receiver is capable of scanning in excess of 30 channels per second. This means it can scan through the entire aviation band of 720 channels from 118-136MHz in less than 24 seconds. It was quite a challenge getting all this functionality into the 1k of code space available in the PIC16C84, but with a lot of optimization I managed it.
The next task was to fit the design into some sort of plastic box. I selected a standard plastic housing that would pass for a hand held device. Initially I intended to create a stack of 4 PC boards inside the box. The first board would contain the digital circuitry – 4 x 3 matrix keypad, LCD and its driver chip and the microprocessor and associated components. The next board would contain the power supply, audio circuits, squelch, AGC and PLL synthesizer and other miscellaneous items and the two other boards being the original RF frontend and IF sections. Initially I thought I could get away with separating the PLL synthesizer from the RF board – interfacing it to the local oscillator through a short piece of coax cable, this is where some of the troubles began. Getting a single device in an RF application to work in isolation on its own PC board is a relatively simple task, but integrating a whole design onto one PC board and getting it all to work well is another story altogether. In the case of a radio receiver circuit, interference can make its way into the sensitive input circuits through a number of ways, particularly through bad grounding arrangements and it can render the circuit useless. Phase locked loop circuits are also particularly sensitive to noise – this will lead to poor phase noise performance of the oscillator and thus result in a noisy and possibly distorted demodulated signal. The first iteration of this 4 board arrangement definitely performed far worse than my initial breadboarded prototype.
Keypad and LCD user interface.
I decided to re-visit the RF circuit and reduce it down to one PC board instead of 2 and also integrate the PLL synthesizer and part of the AGC amplifiers. I would then rework the other analogue board to improve its layout. Although the original RF circuit boards had performed well, if they had been put through a rigorous series of radio receiver tests to test things like image rejection, and out of band signal rejection the performance would have been poor. They were also built entirely from leaded components and I needed to move to surface mount to reduce the overall circuit size. I reworked the receiver chain starting with the addition of a high order image reject filter on the input and replacing the JFET mixers with NE602 double balanced mixers. Those parts of the original circuit that worked well I kept, such as the variable gain amplifiers and the final IF amplifier and detector. I also introduced additional ceramic filters at 10.7MHz to improve secondary the image rejection. When the board was complete and working it had its own set of problems – mainly poor signal to noise ratio and interference from the PLL getting into the receiver front end. Specifically the 13th harmonic of the 9.6MHz synthesizer reference oscillator is 124.8MHz, which happens to be the designated unmanned air to air communication frequency in South Africa. This meant the receiver had very poor sensitivity on this frequency and only the strongest radio transmissions were readable. I spent a lot of effort trying to get to the bottom of the interference issues associated with this layout, which included removing components from the board to isolate different sections, cutting or joining various sections of ground plane and changing decoupling components. The final conclusion was that the board would need to be reworked.
RF designs can be very frustrating and take a great deal of know how and experience to get right. As a result of changing jobs and no longer having access to RF test equipment I shelved this project for an extended period of time with the intention of revisiting it at some stage in the future. In the mean time however through working on other analogue projects, both hobby and work related I was able to gain the experience and understanding of the design issues which ultimately would help to get this project performing well.
Possibly the biggest issue in this design was the grounding arrangements. It is common practise in RF design when laying out a PC board to throw a solid “infinite” ground plane. Theory states that the impedance between any two points on an infinite ground plane is zero. However one needs to understand exactly what is meant by an infinite ground plane. If one is standing on a sheet of copper plane that extends as far as one can see from horizon to horizon in all directions then for all intents of purposes this will approximate an infinite ground plane. Then if one were to take a multimeter bending down and measure the impedance between any two points on the copper plane within arms reach the impedance would be very close to zero. Unfortunately such a large ground plane does not fit very easily into a hand held item of electronic equipment. So with a PC board copper ground plane typically being limited by the enclosure dimensions to only a few centimetres the impedance between any two point on the plane is anything but zero. Any current flowing between two points in the ground will generate a potential difference across the ground between the two points and lines of equipotential will extend out across the entire plane. No matter how small the induced potential difference is, it still exists. If two or more circuits share the same ground plane as their return path for ground currents then the induced potential from one circuit can affect other circuits. If one of those circuits happens to be a very sensitive input or high gain amplifier then the interference so caused will get amplified greatly. In the case of a radio receiver input stage, all that is required is 1uV of an interfering signal to be developed across the ground plane in the vicinity of the front end to seriously degrade the receivers sensitivity. The solution to all this is to pay very careful attention to the grounding arrangements in a complex circuit and divide up the grounds to regions. If done properly conducted interference can be eliminated completely. Remarkably this is actually just a simple exercise in PC board layout geometry, however I have sometimes encountered other commercial development boards and products that have not followed this rule.
Second iteration RF board (left), AGC, Audio and Supply board (middle), previous AGC, Audio and supply board (right) .
In 2009 I decided to revisit the whole design and finish it once and for all. I intended to use the original digital board with PIC micro, keypad and LCD as these worked fine and there was no need to rework these parts of the circuit. I kept the majority of the circuit schematic the same since it was a tried and trusted design and there was nothing essentially wrong with it. I did however intend to make only one PC board to hold all of the circuitry – RF, audio, AGC, squelch and power supply. I also decided to include a small switcher power supply that I had used on the Flight Computer project so that I could run the entire circuit off two AA rechargeable batteries. The introduction of the switcher presented a possible risk area as switchers are generally noisy and could introduce noise into the IF sections of the receiver. One major change however was to reduce the supply voltage for all circuit blocks from 9V to 5V thus reducing the overall power consumption. The previous versions of the receiver used a 9V supply.
Putting all the circuitry on one board meant downsizing all components – specifically using 0805 resistors. Some may comment 0805 resistors are not particularly small by today's standards – true, but when you are going to solder the whole board up by hand as I do, they are quite small enough. I also intended to use only two layers for the PC board. Multilayer boards are fine when someone else is paying, but for a one off hobby prototype that I am paying for, if I can get away with only using two layers then I will.
In laying out the board my philosophy was to keep all components on one side as far as possible, especially the RF sections and then have a solid “passive” ground plane on the underside called chassis ground. The ground plane is considered passive because it is not connected to any components and does not conduct return currents for any parts of the circuit. I also created fences around each of the circuit blocks on the top side where the fences were connected with vias to the chassis ground. The idea being to be able to place screening cans over each circuit block and so doing contain each block inside a Faraday cage “sandwich” with the PC board. In practise it was not possible to keep the underside chassis ground completely solid as certain signals had to be routed underneath, but given that the shortest wavelengths of the signals present in this design are in the order of 2 metres or more, small breaks of a few mm in the Faraday cages were unlikely to have a detrimental affect.
At the schematic level I created local topside ground nets for each circuit block and then connected each ground net up to the supply ground net by zero ohm links using a star point connection. The chassis ground is also connected up to the supply net at only one point. Each circuit block supply was decoupled to its own local ground net. This way all AC currents local to a circuit block would be contained within that circuit block and prevented from interfering with other circuit blocks. This approach was to overcome the issues I had on the previous iteration with the synthesizer and RF input.
I had the board manufactured professionally using a prototype service which included solder mask and ident cosmetics. When it came to assembly and testing, I did not have access to RF test equipment, however based on past experience with the circuit I was confident this would not present a problem. I was able to make use of my Pico Scope to measure the lower frequency signals. I also made extensive use of the APLAC simulator to verify component value choices for each part of the circuit. The only difficult parts of the circuit to get working were the RF oscillator, synthesizer loop and the front end input filter. But here again I relied upon previous knowledge and experience and APLAC simulations came in very handy.
Example APLAC simulation of the input filter on the frontend
Final iteration (in the process of being assembled and tested), RF, IF, AGC, Audio and supply all in one.
The circuit performance has been quite impressive compared to the earlier versions.
The receiver noise with no antenna attached is at a consistent amplitude and clean throughout the range of receivable frequencies. I verified this by manually tuning the VCO and tracking filter and observing the demodulated signal with my Pico scope, both in the time and spectrum mode. This indicates that there are no detectable digital or spurious signals getting into the RF signal path. Testing for spurious signals is an important part of receiver tests, not only because spurious signals can reduce the sensitivity on certain channels or even render them useless, but it also affects the scanning modes. If there is a spurious signal on a particular channel which is strong enough to break through the squelch level then it will cause the receiver to pause the scan.
I was also able to verify that the receiver sensitivity is within the target range for a good receiver (< 1uV). I'm using the NE602 as first mixer. This device is capable of receiving signals of -119dbm with 12db SINAD. By manually turning up and down the control voltage to the RF input variable gain amplifier that precedes the NE602 I was clearly able to detect a rise and fall in the noise level of the receiver. Given that the input impedance of the RF input amplifier is matched to 50 ohm and its maximum gain is around 10db, this would suggest that the noise referred to the input is around 0.1uV or less.
The channel scan and full scan modes function as expected as does the squelch operation.
The switcher device used for the power supply has not had any detrimental effect on the receiver performance. The device operates as a linear regulator when the input supply voltage is greater than the output voltage and in switching mode when the input is lower than the output voltage. Therefore by varying the input voltage above and below the threshold point and monitoring/listening to the receiver noise it was easy to verify that there was no interference caused by the switcher device.
In previous versions when the microprocessor was programming the synthesizer and LCD display driver through the I2C bus, interference could be heard in the receiver during the data burst. Sometimes this was strong enough to break through the squelch in scan mode. Now the burst of data on the I2C bus cannot be heard.
The results confirm that the approach I adopted of splitting the grounds for each circuit block has effectively solved the interference problems of the previous versions. I have not had to add screening cans as the design is performing adequately without them, however if this were a commercial product then screening cans would be a must, not only to improve immunity to external interference, but also to pass EMI emissions tests.
Without a decent antenna any radio receiver is pretty useless. Most hand held receivers use a whip antenna of some sort, be it an extendible telescopic antenna or a short stubby coil antenna. Although the performance of a whip antenna is adequate, its performance is unpredictable. The reason stems from basic circuit theory – a potential difference has to be applied across two points and in order for a current to flow between those two points an impedance must exist between those two points. The whip antenna is essentially a monopole antenna. A monopole antenna is half of a dipole antenna where one side of the dipole has been removed and replaced with a ground plane. The ground plane forms a mirror image of the other side of the dipole. If a potential difference is developed across the feed points of a monopole antenna with ground plane, then the impedance “seen” across the feed will be as a result of the radiation resistance developed by the monopole and the ground plane (and some other factors). In the case of a whip antenna used in a portable receiver, the ground plane is not present, therefore the impedance seen across the feed cannot be defined. Hand-held receivers make use of the fact that the receiver will be held in the hand and thus there exists capacitive coupling between the receiver internal circuit ground (and chassis) and the hand holding the receiver. Thus the human body forms a substitute for the ground plane in the monopole configuration. However the performance is still quite unpredictable.
To this end I decided that I would construct my own static dipole antenna for use with this receiver. I first modelled the antenna using the 4nec2 application. Credits go to Arie Voors for this fine piece of software (http://home.ict.nl/~arivoors/). I decided to use standard 15mm copper pipe for the Antenna and so I built this into the model. Ideally dipole antennas work best in free space, but this is not always possible or practical and in my case I do not have the means (or inclination) to mount my antenna up a mast high above the ground. Therefore I modelled the antenna mounted on a stand in the vertical configuration with the feed 1.5 metres above ground. With the ground plane included in 4nec2 this predicted that the antenna would have lobes that would extend 360 degrees around the antenna up into the sky, I considered this as adequate.
4nec2 far field pattern
Now the aviation band extends from 118 – 136 MHz but a dipole can only be optimised for one frequency. Also the impedance at the feed point of a dipole at resonance is around 73 ohms. Therefore some sort of matching network is required, not only to match the dipole impedance to 50 ohms, but also to provide better performance over the whole operating range of the antenna. Using 4nec2 I obtained impedances for the frequency range of 118 – 136 MHz in the Smith Chart and then devised a matching network. When creating a matching network it is desirable to be able to tweak the matching components simultaneously and see how this affects the impedance. Most Smith chart PC applications have this functionality but only work at one frequency at a time. For a wide band antenna this is not very helpful. There is however one application that can provide this sort of functionality at multiple frequency points at the same time – Linsmith - the smith chart application for Linux (http://jcoppens.com/soft/linsmith/index.en.php). Using Linsmith I was able to tweak the components in my matching network and bring the locus of the input impedance from 118-136 MHz within a set VSWR circle around the centre point of the Smith chart. In reality it is pointless trying to achieve a perfect match, since the losses in the matching components themselves will offset anything gained by the improved match. A VSWR of 1:1.2 or better can be considered more than sufficient. My matching circuit ended up consisting of a coax stub component and two air coil inductors and a toroid balun which I constructed myself. I dangled the coax stub inside one of the copper pipes of the dipole so that it would not affect the impedance of the antenna. Once I had constructed the antenna I tested it with the HP4195A Vector network analyzer at my work. Given that I did not have access to an RF anechoic chamber, the results I obtained were a fair match to the theoretical predictions and I considered them as acceptable.
4nec2 Smith Chart plot of antenna impedance from 118 - 136 MHz
Using Linsmith to match the antenna impedance (Yellow Dots) to 50 Ohms (Red Dots)
The completed Dipole Antenna
The matching circuit at the feed point
July 1995 -
2009 – 2010 (Final version)